Semiconductor devices are usually provided with a wiring system of a number of metallization planes that are arranged in coplanar fashion one above the other, with an intermetal dielectric being present between the metallization planes. Such a metallization plane is in each case structured into conducting paths, via which individual components of the circuit integrated into the semiconductor device are connected to each other. The intermetal dielectric is usually silicon dioxide, silicon nitride, phosphorus silicate glass (PSG), an organic material with a low relative dielectric constant such as siloxane, or a porous material with a low relative dielectric constant such as SiCOH. Between the conducting paths of the various metallization planes in the intermetal dielectric there are through-contacts, so-called vias, which produce a vertical electrically conducting connection between the metallization planes.
For external electric connections, there is at least one terminal contact surface, a so-called bond pad, on the upper side. Outside the terminal contact surface, the top side can be coated with a suitable passivation layer. In each case, a bond wire is electrically connected to the terminal contact surface, for example soldered, which is also called “bonding.” The terminal contact surface can be formed by a stack of electrically conducting layers, which are usually metal. The terminal contact surfaces can be aluminum or an aluminum alloy, since aluminum is very resistant to environmental influences, especially corrosion. Likewise, aluminum or copper, but also other metals, can be used for the wiring. Before the bonding, the functioning of the semiconductor device is tested. For this test, probes are brought into contact with the terminal contact surfaces. Since these test probes are made of a hard metal such as tungsten, a mechanical stress arises when a test probe contacts a terminal contact surface and deforms the terminal contact surface. In particular, it is possible in this case for an upper aluminum layer of the terminal contact surface to be damaged so that a copper layer lying under it becomes separated over some of its area, and in this way is exposed to the corrosive effects of the environment. In the bonding process, a significant mechanical strain is produced through the use of ultrasound and high temperature. The mechanical strain advances into deeper layers and can give rise to cracks there, especially in the intermetal dielectric. Then, short circuits between the conducting paths can arise at the affected sites. If active components are situated under the terminal contact surfaces in the semiconductor substrate, in an extreme case, the damage to the circuit components can also take place in the bonding process.
US 2004/0070086 A1 describes a method for preparation of bond pads over elements in which a bond pad is arranged over a passivation layer that is in contact with a terminal surface. For this, an adhesive layer of metal is first applied to the passivation layer and the terminal surface. A minimum 1-μm-thick gold layer is electrolytically deposited on top of that as bond pad.
GB 2 406 707 A describes a reinforcement for bond pads that is formed in combination both with the bond pad and also with an underlying additional metal layer made up of a metal that is different from that of the bond pad.
U.S. Pat. No. 6,552,433 B1 describes a wiring in which the through-contacts in the layers of the intermetal dielectric are parallel trenches, in each case filled with metal. The trenches of the different layers cross, so that a network structure is formed, which serves for mechanical reinforcement and to protect the active components arranged under a bond pad.
Descriptions of mechanical reinforcements of bond pads can also be taken from U.S. Pat. Nos. 6,313,537 B1; 6,100,573; 6,448,650 B1; US 2002/0179991 A1 and US 2002/0170742. U.S. Pat. No. 6,028,367 describes bond pads with rings for heat dissipation.